P5020: QorIQ P5020/10 64-bit Single- and Dual-Core Communications Processors
http://www.freescale.com/webapp/sps/sit ... code=P5020The dual-core P5020 and single-core P5010 processors are Freescale’s first offerings with the 64-bit, e5500 core built on Power Architecture® technology. With frequencies scalable to 2.2 GHz, large caches and high per-cycle efficiency, these products target control plane and compute applications that require high single-threaded performance.
The P5 platform leverages architectural features pioneered in the P4 platform, including the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, data path acceleration architecture (DPAA) for offloading packet handling tasks from the core and the CoreNet switch fabric that eliminates internal bottlenecks. This enables architectural compatibility from the P5 platform to the P4 platform as well as to the P3 platform.
Features
Single or dual 64-bit e5500 cores initially offered at 2.0GHz and scalable to 2.2 GHz
Three level cache-hierarchy: 32 KB I/D L1; 512 KB private L2 per core; 2 MB shared L3
Dual 64-bit (72-bit with ECC) DDR3/3L memory controllers to 1.3 GHz data rate
18 SerDes lanes up to 5 GHz, supporting 4x PCI Express® 2.0, 2x Serial RapidIO® (1.3+2.1), XAUI, 5x SGMII/2.5Gbps SGMII, 2x serial ATA 2.0, Aurora debug port
Hardware acceleration:
Frame manager for packet handling
Queue manager for policing, scheduling and workload distribution
Pattern matching engine for regular expression seaches
RAID5/6 for parity calculations in storage applications
Security block for crypto algorithm acceleration
RapidIO message manager for type 9 and 11 messaging
Hardware hypervisor for safe partitioning of operating systems between cores
Trusted boot capability to ensure only the correct code is booted and that code is not reverse-engineered
SD/MMC, 2x DUART, 4x I²C, 2x USB 2.0 with integrated PHY
Pin and SW compatible with P4040, P4080 and P3041
This product is included in Freescale’s product longevity program, with assured supply for a minimum of 10 years after launch
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P5040: QorIQ P5040/5021 64-bit Dual- and Quad-Core Communications Processors
http://www.freescale.com/webapp/sps/sit ... code=P5040The QorIQ P5 family delivers scalable, 64-bit processing with single-, dual-, and quad-core devices. With frequencies scaling up to 2.4 GHz, a tightly coupled cache hierarchy for low latency, and integrated hardware acceleration, the P5040 (quad-core) and P5021 (dual-core) devices are ideally suited for compute intensive, power-conscious control plane applications.
Features
Four (P5040) or two (P5021) single threaded e5500 cores built on Power Architecture® technology
Up to 2.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
Three levels of instruction: user, supervisor, hypervisor
Hybrid 32-bit mode to support legacy software and transition to 64-bit architecture
CoreNet platform cache (CPC)
2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric
Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support
Up to 1600MT/s
DPAA incorporating acceleration for the following functions
Packet parsing, classification, and distribution (FMAN)
Queue management for scheduling, packet sequencing and congestion management (QMAN)
Hardware buffer management for buffer allocation and de-allocation (BMAN)
Cryptography acceleration (SEC 5.0) at up to 40 Gbps
SerDes
20 lanes at up to 5 Gbps
Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA
Ethernet interfaces
Two 10 Gbps Ethernet MACs
Ten 1 Gbps Ethernet MACs
High-speed peripheral interfaces
Two PCI Express 2.0/3.0 controllers
Additional peripheral interfaces
Two serial ATA (SATA 2.0) controllers
Two high-speed USB 2.0 controllers with integrated PHY
Enhanced secure digital host controller (SD/MMC/eMMC)
Enhanced serial peripheral interface (eSPI)
Two I²C controllers
Four UARTs
Integrated flash controller supporting NAND and NOR flash
DMA
Dual four channel
Support for hardware virtualization and partitioning enforcement
Extra privileged level for hypervisor support
QorIQ Trust Architecture 1.1
Secure boot, secure debug, tamper detection, volatile key storage